A double data rate (DDR) synchronous dynamic random access memory (SDRAM) is a memory device which inputs and outputs data by synchronizing the data with a rising edge and a falling edge of a clock signal, and is provided with a data input device and a data output device which operate in synchronization with the rising edge and the falling edge of the clock signal. Dynamic random access memory (DRAM) is an important device, which saves digital data. A synchronous dynamic random access memory (SDRAM) is one kind of DRAM that is synchronized with operation speed and clock signal. In order to further improve the operation speed, a concept of a DDR SDRAM has been extensively used. The term "double data rate" means that the peak data rate is twice the rate at which commands may be clocked into the device. Commands are received as input on the positive edges of the memory clock, while the data is read or written on both the positive and negative edges of the memory clock. DDR SDRAM is structured and functions similarly to regular SDRAM, but doubles the bandwidth of the memory by transferring data twice per cycle. The double data rate operation utilizing the rising and falling edges of the DQS signal is usually performed only in the input/output buffers of a DDR SDRAM. The internal operations of a DDR SDRAM are performed at an interval of one clock. DDR SDRAM use a source synchronous interface for reading and writing data. The source synchronous clock strobe on DDR SDRAM is named DQS. When a double data rate (DDR) SDRAM performs a write operation, the DDR SDRAM latches data at a rising and a falling edge of a DQS signal, and thus operates twice as fast as the frequency of a clock signal CLK. That is, it operates at double data rate.
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